1. Field of the Invention
The present invention relates to a method and an apparatus for forming a thin film uniformly on a wafer with improved characteristics, and more particularly, to a method of producing plasma from a first gas and a second gas to form a layer on a wafer while contaminant particles produced from the second gas are removed to form a thin film uniformly on the wafer with improved characteristics and an apparatus for performing the same.
2. Description of the Related Art
Recent advances in semiconductor devices tend to be in high integration and high performance for processing more data in a shorter time. To manufacture highly integrated high-performance semiconductor devices, a technique of depositing a thin film precisely on a semiconductor substrate is important.
Generally, techniques of depositing a thin film on a wafer can be divided into physical vapor deposition (PVD) using a physical method and chemical vapor deposition (CVD) using a chemical method.
In physical vapor deposition, a heater is installed and a source material is placed on the heater. A source material is disposed in an upper portion of a chamber under a high vacuum condition. The wafer separated from the heater is disposed in the chamber. When the heater heats a source material to a high temperature, the source material evaporates and is consolidated on the wafer to form a thin film.
In physical vapor deposition, metal particles are separated from a target to form a metal thin film using an argon gas ionized by a high voltage. However, physical vapor deposition is used in limited processes because it typically results in formation of a non-uniform film.
In chemical vapor deposition, a semiconductor layer or an insulating layer of a single crystal is formed on a surface of the wafer using a chemical reaction of a source material. The chemical vapor deposition may be a low-pressure chemical vapor deposition (LPCVD), an atmospheric pressure chemical vapor deposition (APCVD), a plasma enhanced chemical vapor deposition (PECVD) and a high-pressure chemical vapor deposition (HPCVD), according to a pressure in a chamber. Chemical vapor deposition is used to deposit thin films such as an amorphous silicon layer, a silicon oxide layer, a silicon nitride layer or a silicon oxynitride layer on the wafer.
In plasma enhanced chemical vapor deposition, electrons of high energy collide with the neutral gas molecules to decompose the gas molecules, and the thin film is deposited by using deposition of decomposed gas atoms on a semiconductor substrate. Plasma is formed from a precursor gas in a chamber while depositing the thin film at a relatively high deposition rate at a low temperature. However, in chemical vapor deposition, when step coverage of the thin film is not good, voids may be formed in the thin film. As the depositing process progresses and the gap between patterns decreases, the voids increase. The voids formed in the thin film cause many problems such as deteriorating characteristics of the thin film and increased failures of subsequent processes.
In order to solve the problems of the plasma enhanced chemical vapor deposition method, a chemical vapor deposition using a high-density plasma chemical vapor deposition (HDP-CVD) has been used. In the high density plasma chemical vapor deposition, as an etching process using sputtering is performed while depositing the thin film, the thin film is formed without voids in a gap of high aspect ratio. However, when a gap width is shortened or multiple thin film depositions are performed, the HDP-CVD also may not fill up the gap without the voids because silicon oxide etched during the sputtering process is re-deposited. When silicon oxide is re-deposited, an overhang structure in the silicon oxide layer is formed. The overhang structure may form the voids in the thin film. The overhang structure is disposed on a corner of the pattern. Recently, a number of process steps such as adding an etching gas to a source gas and controlling temperature of the wafer are performed to solve the problems of HDP-CVD.
FIG. 1A is a Scanning Electron Microscope (SEM) image illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 700 W was applied to form an oxide layer on a central portion of a wafer, and FIG. 1B is a Scanning Electron Microscope (SEM) image illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 700 W was applied to form an oxide layer on a peripheral portion of a wafer.
Referring to FIGS. 1A to 1B, when a bias power of about 700 W is supplied, voids and porous layers 13, 14 are formed on each of the thin film patterns of a central portion and a peripheral portion of a wafer to deteriorate gap fill characteristics of a thin film. An upper portion 15, 16 of the deposited thin films on the central portion and the peripheral portion of the wafer are non-uniform, and the thin film deposited on the central portion is more uniform than the thin film deposited on the peripheral portion. The films having the non-uniformity cause numerous defects.
FIG. 2A is a Scanning Electron Microscope (SEM) image illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 900 W was applied to form an oxide layer on a central portion of a wafer, and FIG. 2B is a Scanning Electron Microscope (SEM) image illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 900 W was applied to form an oxide layer on a peripheral portion of a wafer.
Referring to FIGS. 2A to 2B, when a bias power of about 900 W is supplied, voids and porous layers are not formed on a central portion of a wafer, thereby having good gap fill characteristics. An upper portion 25 of the thin film is uniform. However, voids and porous layers are formed on a peripheral portion 22 of a wafer. The gap fill characteristics of FIG. 2B are better than the gap fill characteristics of FIG. 1B. But, the thin film of FIG. 2B may also cause defects.
FIG. 3A is a Scanning Electron Microscope (SEM) image illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 1,100 W was applied to form an oxide layer on a central portion of a wafer, and FIG. 3B is a Scanning Electron Microscope (SEM) picture illustrating a cross-sectional view of an oxide layer according to a conventional method of an HDP-CVD of adding an etching gas, when a bias power of about 1,100 W was applied to form an oxide layer on a peripheral portion of a wafer.
As shown in FIGS. 1A to 3B, in accordance with a conventional method of an HDP-CVD of adding an etching gas, the gap filling characteristics are greatly varied according to an increase in the bias power.
Referring to FIGS. 1A and 1B, when a bias power of about 700 W is applied, voids are formed in each thin film formed in a central portion 11 and a peripheral portion 12 of the wafer. Further, porous thin films are formed in the central portion 11 and the peripheral portion 12. Thus, unpreferable gap-filling characteristics are shown. The upper portions 15, 16 of the thin film formed in the central portion 11 and a peripheral portion 12 of the wafer shows non-uniformity that increases from the central portion 11 towards the peripheral portion 12. The thin films as shown in FIGS. 1A and 1B are inadequate for use and thus discarded.
When a bias power of about 900 W is applied, no void is formed in each film formed in the central portion 21 as shown in FIG. 2A. Also, no porous film is formed in the central portion and the upper portion. 25 of thus formed thin film shows uniformity. Thus, good gap-filling characteristics are shown. However, as shown in FIG. 2B, voids are formed in the thin film formed in the peripheral portion 22 of the wafer. Also, a porous film is formed in the peripheral portion 22. Further, the uniformity of the upper portion 26 of the deposited thin film is better than the thin layer as shown in FIG. 1B. However, the upper portion 26 is somewhat non-uniform in thickness and thus may induce a failure in a subsequent process.
Referring to FIGS. 3A to 3B, when a bias power of about 1,100 W is applied, voids and porous layers are not formed in each of the thin film patterns of a central portion 31 and a peripheral portion 32 of a wafer to have good gap filling characteristics. Upper portions 35, 36 of the thin films formed on the central portion 31 and the peripheral portion 32 of the wafer are uniform. However, an upper portion 33 of a predetermined layer disposed under the thin film is over-etched, thereby generating a clipping phenomenon.
Generally, when the deposition process is performed on the patterns having a short gap width and a number of thin films is increased, silicon oxide etched by sputtering is re-deposited on a peripheral region of the patterns. Since the re-deposition causes generation of the voids in the thin film, a proper bias power suitable for filling the gap is applied to the patterned region having the gap. However, when a bias power is increased to more than a predetermined power, a corner of a silicon oxide layer is over-etched in a direction of about 45 degrees to cause the clipping phenomenon. Therefore, improvement in layer characteristics by increasing the bias power is limited.
An apparatus for performing a chemical vapor deposition process comprises a reaction chamber in which gases are chemically reacted with each other. A dielectric layer, a conductive layer or an insulating layer is deposited on a substrate using a gas reaction in the reaction chamber. During the deposition process of the thin film, not only is the thin film formed on a substrate, but the thin film is also formed on various structures such as a masking structure in the reaction chamber or a substrate-supporting structure, thereby forming contaminant particles in the reaction chamber. During a subsequent deposition process of the thin film, a crack is formed in the layer and the layer is peeled off so that the contaminant particles may drop on the substrate. The layer is formed on the inner wall of the reaction chamber or the various structures. In order to improve deposition efficiency, the reaction chamber is cleaned regularly to remove the contaminant particles. The cleaning is performed by means of introducing an etching gas having fluorine such as trifluoro-nitrogen (NF3). The fluorine etches silicon, silicon oxide, etc., using an ion impact of a plasma reaction to remove the contaminants deposited on the inner wall of the reaction chamber. However, after the cleaning, fluorine contaminants remain in the reaction chamber to degrade the quality of the thin film that is subsequently deposited. For example, voids may be formed in an amorphous silicon thin film formed on a silicon nitride layer. In order to reduce damage caused by the fluorine contaminants, a length of a nozzle that supplies,the etching gas is controlled and an amount of a power supply is increased. However, the control of the length and the increment of the power supply cause a formation of non-uniform thin film on the wafer.
FIG. 4 is a sectional view illustrating an HDP-CVD apparatus, and FIG. 5 is a partial perspective view illustrating an enlarged gas-supplying unit of the HDP-CVD apparatus in FIG. 4.
Referring to FIGS. 4 and 5, the conventional HDP-CVD comprises a reaction chamber 10, a wafer holder 30 for supporting a wafer 40, an electrostatic chuck 20 installed on the wafer holder 30, a reaction gas-supplying tube 50 and a purge gas-supplying tube 60.
An upper portion of the reaction chamber 10 has a dome shape, and a radio frequency (RF) coil 80 is disposed on an outer portion of the reaction chamber 10. The wafer holder 30 is disposed on an inside of the reaction chamber 10, and the electrostatic chuck 20 is installed on the wafer holder 30. The reaction gas-supplying tube 50 is disposed on the inside of the reaction chamber 10. The reaction gas-supplying tube 50 is disposed on the reaction chamber 10 relative to a central axis of the electrostatic chuck 40 in regular intervals. Generally, a reaction gas-supplying tube 50 supplies a source gas for depositing a thin film and an etching gas for improving deposition efficiency. A purge gas-supplying tube 60 is disposed below the reaction gas-supplying tube 50. The reaction gas-supplying tube 50 is a tube having a predetermined diameter, and a nozzle is inclined toward a center of the upper portion of the reaction chamber 10. A vacuum pump 70 is disposed on a side of the reaction chamber 10.
When the wafer 40 is mounted on the electrostatic chuck 20, the vacuum pump 70 controls a pressure in the reaction chamber 10. A reaction gas for depositing the thin film is supplied through the reaction gas-supplying tube 50. In order to improve the deposition efficiency, the etching gas is supplied together with the reaction gas. After the reaction gas and the etching gas are supplied into the reaction chamber 10, a bias power from an RF power-supplying unit is supplied to the wafer holder 30. When the bias power is supplied, plasma is formed in the reaction chamber 10 and the thin film is deposited on the wafer 40.
An interval between patterns of a thin film formed on a semiconductor substrate decreases according to a high integration and a high performance of a semiconductor device. As the interval between the patterns decreases, the deposition efficiency is deteriorated. Therefore, an etching gas is needed. Generally, a gas having fluorine is used as the etching gas. However, the fluorine residues remain in the reaction chamber to deteriorate characteristics of the thin film formed on the wafer. Also, contaminants formed by means of an etching gas are deposited on an inside wall of the reaction chamber and structures (or parts) in the reaction chamber such as a cover or a substrate supporting structure to form contaminant particles. During the subsequent deposition process of the thin film, a crack is formed in the contaminant particles deposited on the inner wall of the reaction chamber or the contaminant particles are removed from the inner wall. Therefore, the contaminant particles may drop on the substrate, and the semiconductor device may become damaged or defective.
In order to reduce the damage or the defects, a length of the etching gas-supplying tube is preferably shortened and the bias power is preferably increased. However, when the length of the etching gas-supplying tube is shortened, the thin film on the wafer is formed non-uniformly. Also, when the bias power increases, energy of high-density plasma is also increased to non-uniformly etch the thin film on the wafer. Over-etching causes re-deposition and clipping. Also, an over-etched portion and under-etched portion are formed on the wafer, thereby causing problems in subsequent processes.